1. POP rp:
- The “POP rp” instruction Retrieves (pops) 2 bytes from the top of the stack and stores them in a register pair (rp).
- The register pair (rp) can be BC, DE, HL, or PSW (Processor Status Word).
- PSW is a combination of the Accumulator (MS byte) and Flags register (LS byte).
- Example: Example: POP PSW Decrements SP by 2. Loads two bytes from the new top of the stack into the specified register pair.
2. PUSH rp:
- The “PUSH rp” instruction stores the contents of register pair (rp) by pushing it into two locations above the top of the stack.
- “PUSH B” is provided as an example, representing the instruction to push the BC register pair onto the stack.
3. XTHL:
- XTHL is a mnemonic that stands for ‘eXchange Top of stack with HL’. This instruction exchanges the contents of the top two locations of the stack with the contents of register pair HL.
- Example: XTHL swaps the values in HL with the top two bytes of the stack.
4. SPHL:
- Loads the contents of the HL register pair into the stack pointer (SP).
- Example: SPHL sets the stack pointer to the address currently in HL.
5. LXI SP, 16-bit address:
- Loads a 16-bit immediate value into the stack pointer (SP).
- LXI SP, FC06H: This instruction loads the Stack Pointer (SP) with the value FC06H.
6. DCX SP
- It decrements the Stack Pointer (SP) contents by 1.
- Example: DCX SP decrements the Stack Pointer (SP) contents by 1.
7. DAD SP
- It adds the Stack Pointer (SP) contents to the contents of register pair HL and stores the result in HL.
- Example:
- DAD SP is the addition of SP contents to HL, with the carry flag being affected.
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